Saturday, February 15

MS72
Novel Computational Algorithms for Future Computing Platforms - Part III of III

1:50 PM - 3:30 PM
Room: 501

For Part II, see MS62

In the early 2000s, due to constraints on economical heat dissipation, clock speeds of single-core CPUs could no longer be increased, which marked the adoption of multi-core CPUs, together with a paradigm shift to algorithms specifically designed for multi-core architectures. About 15 years into this current architectural cycle and on its way to exascale performance, the computing industry finds itself at the confluence of technical difficulties that cast doubt on its ability to sustain this architectural model beyond the exascale capability. These difficulties are driving the hardware industry to develop application-specific chips and to look beyond silicon- based chips (e.g., quantum computing, physical annealing, neuromorphics, etc.), with a continued emphasis on raw processing power and emerging concerns about energy efficiency.

Hardware specialization will likely redefine the way computational algorithms are developed over the next two decades for a wide range of important applications: large-scale PDE-based problems (CFD, wave propagation, subsurface modeling, etc.), artificial intelligence, computational chemistry, and optimization problems, to name a few. The pressure to decrease time to solution or improve simulation fidelity, or both, for these applications will continue unabated.

This minisymposium provides a forum for sharing innovative ideas on algorithm development for leveraging future computing platforms.

Organizer: Arash Fathi
ExxonMobil Research and Engineering, U.S.
Dimitar Trenev
ExxonMobil Research and Engineering
Jason Riedy
Georgia Institute of Technology, U.S.
Jeffrey Young
Georgia Institute of Technology, U.S.
Laurent White
ExxonMobil Research and Engineering

1:50-2:10 Leveraging Random Walks and Neuromorphic Hardward to Solve Elliptical Integro-PDEs abstract
Brad Aimone and updated J. Darby Smith, Sandia National Laboratories, U.S.
2:15-2:35 Adaptive Local Timestepping and its Parallelization abstract
Max Bremer, University of Texas at Austin, U.S.; John Bachan, Lawrence Berkeley National Laboratory, U.S.; Cy P. Chan, Massachusetts Institute of Technology, U.S.; Clint Dawson, University of Texas at Austin, U.S.
2:40-3:00 The Rogues Gallery as a Testbed for Novel Algorithm Design for Future Architectures abstract
Jeffrey Young and Jason Riedy, Georgia Institute of Technology, U.S.; Thomas M. Conte, ; Vivek Sarkar, Georgia Institute of Technology, U.S.
3:05-3:25 Design of New Streaming and Graph Analytics Algorithms for the Strider Architecture abstract
Sriseshan Srikanth, Georgia Institute of Technology, U.S.; Thomas M. Conte,
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